An alternative carry-save arithmetic for new generation field programmable gate arrays
Küçük Resim Yok
Tarih
2016
Yazarlar
Dergi Başlığı
Dergi ISSN
Cilt Başlığı
Yayıncı
Tubitak Scientific & Technological Research Council Turkey
Erişim Hakkı
info:eu-repo/semantics/openAccess
Özet
In this work, a double carry-save addition operation is proposed, which is efficiently synthesized for 6-input LUT-based field programmable gate arrays (FPGAs). The proposed arithmetic operation is based on redundant number representation and provides carry propagation-free addition. Using the proposed arithmetic operation, a compact and fast multiply and accumulate unit is designed. To our knowledge, the proposed design provides the fastest multiply-add operation for 6-input LUT-based FPGA systems. A finite impulse response filter implementation is given to show the performance of the proposed structure. The proposed implementation provides a dramatic performance increase, which is at least 2 times faster than conventional binary multiply-add implementations.
Açıklama
Anahtar Kelimeler
Digital Arithmetic, Redundant Numbers, FPGA, FIR Filters
Kaynak
Turkish Journal Of Electrical Engineering And Computer Sciences
WoS Q Değeri
Q4
Scopus Q Değeri
Q3
Cilt
24
Sayı
2
