Bulut E.B.Gulbahce M.O.Kocabas D.A.Dusmez S.2024-06-122024-06-1220219.7838E+122191-3358https://hdl.handle.net/20.500.14551/176872021 International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2021 -- 3 May 2021 through 7 May 2021 -- -- 172114Si based three-level (3L) totem-pole (TP) Power Factor Correction (PFC) topology is a low cost alternative to two-level TP PFC with wide-band gap devices providing high power density and high efficiency. This study proposes a system level optimization algorithm through modeling all sub-systems of the converter including differential mode noise filter, PFC inductor, heatsink required by the FETs. Depending on the weights assigned between volume, cost and power loss, the algorithm chooses the switching frequency, designs the PFC inductor, and chooses the FETs from the database that minimizes the given cost function. In this study, a 3.7 kW 3L TP PFC is designed with a final cost function having 60%, 20% and 20% weighting coefficients for volume, cost and power loss, respectively. Results show that optimum design reached 99.01% of efficiency, with total volume of 340 cm3 for DM filter, PFC inductor, heatsink and bus capacitor. © VDE VERLAG GMBH · Berlin · Offenbach.eninfo:eu-repo/semantics/closedAccessCost Functions; Costs; Electric Inductors; Electric Power Factor Correction; Energy Management; Heat Sinks; Intelligent Robots; Power Electronics; Cost-Function; Optimisations; Power Densities; Power Factor Correction Topologies; Power Factor Corrections; Powerloss; Si-Based; Three Level (3l); Three-Level; Volume Loss; Energy GapConference Object2021-May152715342-s2.0-85117726303N/A