Limited Carry-Propagate Multiply-Accumulate Unit Design for Reconfigurable Systems

Basit Öğe Kaydı
dc.authoridcini, ugur/0000-0002-9827-7993
dc.authorwosidcini, ugur/AAT-6952-2020
dc.contributor.authorCini, Ugur
dc.contributor.authorKocyigit, Gokhan
dc.date.accessioned2024-06-12T11:08:50Z
dc.date.available2024-06-12T11:08:50Z
dc.date.issued2017
dc.departmentTrakya Üniversitesien_US
dc.description.abstractCounter and compressor arrays are frequently employed in multiplier design to efficiently reduce partial products in VLSI design. On the other hand, in reconfigurable systems, fast carry chains boost the performance of carry-propagate adders. So that, in reconfigurable systems, to save logic element area, counter and compressor trees are not employed as much since they require more area than carry-propagate scheme. In this work, carry-propagate multi-operand adders are employed in smaller blocks and the outputs are merged using double carry-save encoding to increase performance in reconfigurable systems. Hence, a more compact structure is achieved, compared to full redundant partial product reduction scheme providing comparable speed performance with counter array based carry-save structure. To show the effectiveness of the implementation, fused multiply-accumulate ( MAC) units are designed for various bit-widths. The structure is implemented on Altera (TM) Stratix III and Cyclone III FPGAs and the results show that, using least depth of pipeline, the throughput is better than regular carry-propagate and fully redundant carry-save reduction schemes.en_US
dc.identifier.doi10.5755/j01.eie.23.2.17997
dc.identifier.endpage39en_US
dc.identifier.issn1392-1215
dc.identifier.issue2en_US
dc.identifier.scopus2-s2.0-85019936807en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage36en_US
dc.identifier.urihttps://doi.org/10.5755/j01.eie.23.2.17997
dc.identifier.urihttps://hdl.handle.net/20.500.14551/22584
dc.identifier.volume23en_US
dc.identifier.wosWOS:000400347000006en_US
dc.identifier.wosqualityQ3en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherKaunas Univ Technologyen_US
dc.relation.ispartofElektronika Ir Elektrotechnikaen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectMultiply-Accumulate Uniten_US
dc.subjectMulti-Operand Adderen_US
dc.subjectRedundant Numbersen_US
dc.subjectCarry-Save Arithmeticen_US
dc.subjectFPGA Arithmeticen_US
dc.titleLimited Carry-Propagate Multiply-Accumulate Unit Design for Reconfigurable Systemsen_US
dc.typeArticleen_US

Dosyalar

Koleksiyon

WoS İndeksli Yayınlar Koleksiyonu
Scopus İndeksli Yayınlar Koleksiyonu

We collect and process your personal information for the following purposes: Authentication, Preferences, Acknowledgement and Statistics.
To learn more, please read our privacy policy.

Customize