Encryption Time Comparison of AES on FPGA and Computer

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dc.authorscopusid55834772700
dc.authorscopusid16232085100
dc.contributor.authorAkman Y.
dc.contributor.authorYerlikaya T.
dc.date.accessioned2024-06-12T10:24:47Z
dc.date.available2024-06-12T10:24:47Z
dc.date.issued2013
dc.descriptionAIRCC Publishing Corporation;CSITC;HAVELSAN;KTDen_US
dc.description3rd International Conference on Computational Science, Engineering and Information Technology, CCSEIT 2013 -- 7 June 2013 through 9 June 2013 -- Konya -- 98896en_US
dc.description.abstractAdvanced Encryption Standard (AES), which is approved and published by Federal Information Processing Standard (FIPS), is a cryptographic algorithm that can be used to protect electronic data. The AES algorithm can be programmed in software or hardware. This paper presents encryption time comparison of the AES algorithm on FPGA and computer. In the study, Verilog HDL and C programming language is used on the FPGA and computer, respectively. The AES algorithm with 128-bit input and key length 128-bit (AES-128) was simulated on Xilinx ISE Design Suite 13.3. It was observed that, the AES algorithm runs on the FPGA faster than on a computer. We measured the time of encryption on FPGA and computer. Encryption time is 390ns of AES on FPGA and 11 ?s of AES on a computer.en_US
dc.identifier.doi10.1007/978-3-319-00951-3_30
dc.identifier.endpage324en_US
dc.identifier.isbn9.78332E+12
dc.identifier.issn2194-5357
dc.identifier.issue1en_US
dc.identifier.scopus2-s2.0-84883004020en_US
dc.identifier.scopusqualityN/Aen_US
dc.identifier.startpage317en_US
dc.identifier.urihttps://doi.org/10.1007/978-3-319-00951-3_30
dc.identifier.urihttps://hdl.handle.net/20.500.14551/16012
dc.identifier.volume225en_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherSpringer Verlagen_US
dc.relation.ispartofAdvances in Intelligent Systems and Computingen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectAdvanced Encryption Standard (Aes); Aes-128; Encryption; Fpga; Performance Analysisen_US
dc.subjectAlgorithms; C (Programming Language); Computer Hardware Description Languages; Data Privacy; Data Processing; Field Programmable Gate Arrays (Fpga); Information Technology; Advanced Encryption Standard; Aes Algorithms; Aes-128; Cryptographic Algorithms; Electronic Data; Performance Analysis; Time Comparison; Verilog Hdl; Cryptographyen_US
dc.titleEncryption Time Comparison of AES on FPGA and Computeren_US
dc.typeConference Objecten_US

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